1. Field of the Invention
The present invention relates to a method and an apparatus suitable for fabricating a semiconductor device capable of high-speed operation.
2. Description of the Related Art
In pursuit of improvement in degree of integration and in operation speed of semiconductor integrated circuit devices, a MOSFET as a constituent thereof is becoming downsized, and a gate insulating film is becoming thinned. A gate electrode formed on the insulating film is composed solely of a polysilicon layer, or a stack of a polysilicon layer and a silicide layer. The polysilicon layer is doped with an impurity ion species at the same time as ion-implantation for source-and-drain regions. For example, a gate electrode and source-and-drain regions of a surface-channel-type n-channel MOSFET has an n-type impurity such as phosphorus doped therein by ion implantation. On the other hand, a gate electrode and source-and-drain regions of a surface-channel-type p-channel MOSFET has a p-type impurity such as boron doped therein by ion implantation.
The surface-channel-type p-type MOSFET, however, raises a problem of causing penetration of boron implanted into the gate electrode through the gate insulating film to reach an n-type channel region, when the gate insulating film has only a small thickness. This undesirably varies the threshold voltage and degrades the charge mobility.
With respect to the phenomenon, it has been known that the introduction of nitrogen into the gate insulating film can effectively suppress the boron penetration. One known method of introducing nitrogen into silicon oxide film composing a gate insulating film is such as heating a silicon substrate by resistance heating or lamp heating in a nitriding gas atmosphere containing NH3 gas, NO gas, N2O gas or the like. Another known method is such as introducing a higher concentration of nitrogen into a surface of the silicon oxide film using a nitrogen plasma.
On the other hand, for a case where a gate insulating film of not thicker than 2 nm is used, it is known that a tunneling current may flow between a gate electrode and a channel region, to thereby increase a gate leakage current. For example, decrease in the thickness of the gate insulating film by 0.2 nm or around may result in increase in the gate leakage current by one order of magnitude or around. Control of the thickness of the gate insulating film is therefore understood as an important issue.
It is also known that a gate insulating film, entire portion or a part of which is composed of a high-dielectric-constant insulating film having a dielectric constant larger than that of a silicon oxide film, makes it possible to increase the physical thickness, while suppressing the thickness on the basis of inversion capacity, and to thereby suppress a gate leakage current. The high-dielectric-constant insulating film can be exemplified by a silicon oxynitride film. The silicon oxynitride film generally has a larger dielectric constant than the silicon oxide film has, and is therefore effective for increasing the physical thickness while suppressing the thickness on the basis of inversion capacity.
Patent document 1 describes a method of forming a gate insulating film having a uniform nitrogen concentration. In this method, a gate insulating film composed of silicon oxide formed on a silicon substrate is introduced with nitrogen by remote plasma nitriding, and is then annealed for oxynitriding at 800° C. to 1100° C. in a N2O atmosphere, to thereby re-distribute the nitrogen. It is also described that formation of a gate insulating film having a uniform nitrogen concentration of 6 at % or more, for example 8 at % or 10 at %, makes it possible to obtain a long-life, and highly reliable transistor. The remote plasma nitriding described herein refers to a treatment in which a nitrogen plasma is generated with the aid of microwave or the like in a plasma generation chamber which is separately provided besides a treatment chamber having a substrate housed therein, and active nitrogen is transferred to the treatment chamber so as to proceed nitriding.
Patent document 2 describes a technique of suppressing nitrogen concentration in the vicinity of the interface with a Si substrate, aiming at solving a problem that nitrogen introduced in the vicinity of the interface on the Si substrate side undesirably lowers a carrier mobility of a MOS transistor, and of introducing a larger amount of nitrogen on a film surface side, aiming at reducing a gate leakage current. It is also described that the nitrogen concentration in the surficial portion of the film can be increased by subjecting a silicon oxynitride film, preliminarily doped with nitrogen, to radical nitriding using nitrogen gas, so as to suppress a flow of nitrogen diffusing from the surficial portion, and to thereby suppress the amount of introduction of nitrogen in the vicinity of the interface with the silicon substrate.
However, these conventional techniques may sometimes result in only insufficient levels of control of the thickness and characteristics of the gate insulating film.
Related arts are disclosed in:
patent document 1 (Japanese Patent Application Laid-Open No. 2002-198531);
patent document 2 (Japanese Patent Application Laid-Open No. 2002-110674); and
patent document 3 (Japanese Patent Application Laid-Open No. 2002-100627).